A trinary logic circuit uses signals having relatively positive, negative and zero voltage values. An inverter is a basic device for converting a positive signal to a negative signal and vice versa.
One consideration in the design of a trinary inverter is the power dissipation of the device when in its quiescent states. Power dissipation is a factor in the design of logic circuits, and is reflected in elevated operating temperatures which can adversely affect circuit performance.
Another consideration is the output impedance of the device in the zero voltage state. High device impedances associated with some types of inverters may be undesirable depending on the circuit application, e.g., for trinary arithmetic or logic.
Of possible relevance are the following United States patent references.
The patent to Davies, Jr., U.S. Pat. No. 4,449,065, discloses an input buffer configured of transistors for applying three levels of test signals for testing associated circuitry.
The patent to Engeler et al, U.S. Pat. No. 4,468,574, discloses a binary inverter and other types of logic devices configured of CMOS transistors.
The patent to Trampel, U.S. Pat. No. 3,060,330, discloses a three-level inverter circuit implemented with bipolar transistors.
Other United States patents disclosing tri-level circuits are: U.S. Pat. Nos. 3,129,340; 3,155,845; 3,207,922; 3,671,764 and 3,949,242.